太阳能路灯控制器中英文翻译英文资料.doc

1、PICmicro 中档单片机系列简介中央处理单元 （CPU）通过执行程序存储器中的信息（指令）来控制器件的运行。其中许多指令是对数据存储器进行操作。对数据存储器的操作需要使用算术逻辑单元（ALU）。除了执行算术和逻辑操作外，ALU 还控制状态位（在状态寄存器中）。一些指令的执行结果会根据结果的状态而改变状态位。指令的一般格式中档系列单片机的指令有四种一般格式，如图5-1 所示。指令的操作码从3 位到6 位不等。这种可变长度的操作码组成了35 条指令。中央处理单元（CPU）CPU 被视为器件的“大脑”，它负责获取正确的执行指令、译码并且执行该指令。CPU 有时和 ALU 配合工作来完成指令的执行

2、（如算术或逻辑操作）。CPU 控制程序存储器的地址总线、数据存储器的地址总线以及对堆栈进行存取。指令时钟每个指令周期（TCY）由4 个时钟节拍（Q1-Q4）构成。时钟节拍和器件振荡周期（Tosc）相同。 在各个时钟节拍分别对指令的译码、读取、处理和写操作等进行计时/ 标示。下图表明了时钟节拍和指令周期之间的关系。组成指令周期（Tcy）的4 个时钟节拍归纳如下：Q1： 指令的译码周期或强制性空操作Q2： 指令的读数据周期或空操作Q3： 处理数据Q4： 指令的写数据周期或空操作每条指令都有具体的时钟节拍操作。图5-2： 时钟节拍活动算术逻辑单元（ALU）PICmicro 单片机包含一个8 位 AL

3、U 和一个8 位工作寄存器。ALU 是一个通用的算术逻辑单元，它对工作寄存器和数据寄存器中的数据进行算术和布尔运算。图5-3： ALU 和W 寄存器的操作ALU 是8 位宽，能够进行加、减、移位和逻辑操作。除非特别指明，算术运算一般是以2 的补码形式进行。在2 个操作数的指令中，典型情况下，其中一个操作数是在工作寄存器（W 寄存器）中，另一个操作数放在一个数据寄存器中或是一个立即数。在单操作数指令中，操作数放在W 寄存器中或某个数据寄存器中。W 寄存器是一个8 位宽、用于ALU 运算的工作寄存器，它是一个不可寻址的寄存器。根据所执行的指令，ALU 可以影响状态寄存器中的进位标志位C、辅助进位标

4、志位DC 和全零标志位Z。在减法操作中，C和DC位就分别作为借位和辅助借位之反。例如指令SUBLW 和 SUBWF。状态寄存器状态寄存器（如图5-1 所示）含有ALU 的算术运算结果状态、复位状态及数据存储区的选择位 。因为数据存储区的选择是由状态寄存器控制的，所以各存储区里都有状态寄存器的映射。而且，这些映射在每个存储区的相对位置（偏移位置）都相同（见第6 章“ 存储器构成” 中图 6-5： “ 寄存器映射”）。状态寄存器和其它寄存器一样，可以作为任何指令的目标寄存器。如果状态寄存器作为一条指令的目标寄存器，而这条指令又影响Z、DC 或C 标志位，那么这三个标志位的状态不能由指令直接写入。这

5、些标志位的状态要根据器件逻辑操作的结果来置1 或清零。此外，不能对TO 和PD位进行写操作，所以当执行一条把状态寄存器作为目标寄存器的指令后，状态寄存器的结果可能和预想的不一样。例如，指令CLRF STATUS 将状态寄存器的高3 位清零，将Z 标志位置1。操作后状态寄存器的结果为000u u1uu （u 表示未变化）。因此，建议仅使用位操作指令BCF、BSF 或传送指令MOVWF 来改变状态寄存器，因为这些指令不影响该寄存器中的Z、C 或DC 标志位。关于其它不影响任何状态位的指令状态寄存器bit 7 IRP：寄存器组选择位（用于间接寻址）1：选择Bank 2， Bank3 （100h -

6、1FFh）0：选择Bank 0， Bank1 （00h - FFh）对于只有Bank0 和Bank1 的器件，保留IRP 位，且应始终保持为0。bit 6:5 RP1:RP0：寄存器组选择位（用于直接寻址）11：Bank 3 （180h - 1FFh）10：Bank 2 （100h - 17Fh）01：Bank 1 （80h - FFh）00：Bank 0 （00h - 7Fh）每组128 个字节。 对于只有Bank 0 和Bank1 的器件，保留IRP 位，且应始终保持为0 。bit 4 TO：超时位1 = 上电、执行CLRWDT 或SLEEP 指令后0 = 发生看门狗定时器超时bit 3

7、PD：低功耗标志位1 = 上电或执行CLRWDT 指令后0 = 执行SLEEP 指令后bit 2 Z：零标志位1 = 算术或逻辑运算结果为00 = 算术或逻辑运算结果不为0bit 1 DC：辅助进位/ 借位标志位（ADDWF、ADDLW、SUBLW 和SUBWF 指令）（借位的极性是相反的）1 = 结果的低4 位向高4 位进位/ 低4 位向高4 位无借位0 = 结果的低4 位没有向高4 位进位/ 低4 位向高4 位借位bit 0 C：进位/ 借位标志位（ADDWF、ADDLW、SUBLW 和SUBWF 指令）1 = 结果的最高位有进位/ 最高位无借位0 = 结果的最高位无进位/ 最高位有借位注

8、： 借位的极性是相反的。减法指令通过加上第二个操作数2 的补码来实现。对于移位指令（RRF 和RLF）， C 位值来自源寄存器的最高位或最低位。OPTION_REG 寄存器OPTION_REG 寄存器是可读写寄存器，它包含配置TMR0/WDT 的预分频器、外部INT 中断、TMR0 和PORTB 弱上拉的各个控制位。寄存器 5-2： OPTION_REG 寄存器bit 7 RBPU：PORTB 上拉使能位1 = 禁止PORTB 上拉0 = 按各个端口锁存器值使能PORTB 上拉bit 6 INTEDG：中断触发边沿选择位1 = INT 引脚的上升沿触发中断0 = INT 引脚的下降沿触发中断b

9、it 5 T0CS：TMR0 时钟源选择位1 = T0CKI 引脚上的外部时钟0 = 内部指令周期时钟（CLKOUT）bit 4 T0SE：TMR0 计数边沿选择位1 = T0CKI 引脚上的下降沿递增0 = T0CKI 引脚上的上升沿递增bit 3 PSA：预分频器分配位1 = 预分频器分配给WDT0 = 预分频器分配给Timer0 模块bit 2-0 PS2:PS0：预分频比选择位电源控制寄存器利用电源控制（PCON）寄存器中的标志位和TO 及 PD位，用户可以区别各种不同的器件复位。bit 7 MPEEN：存储器奇偶校验错误状态位该位反映MPEEN 配置位的值。bit 6:3 未用位：读

10、为“0”bit 2 PER：存储器奇偶校验错误复位状态位1 = 没有错误发生0 = 发生程序存储器取奇偶校验错误（在上电复位后必须用软件置1）bit 1 POR：上电复位状态位1 = 未发生上电复位0 = 发生上电复位（上电复位后，由软件置1）bit 0 BOR：欠压复位状态位1 = 未发生欠压复位0 = 发生欠压复位（欠压复位后，由软件置1）附录2 英文参考资料PICmicro MID-RANGE MCU FAMILYIntroductionThe Central Processing Unit (CPU) is responsible for using the information i

11、n the program memory(instructions) to control the operation of the device. Many of these instructions operate ondata memory. To operate on data memory, the Arithmetic Logical Unit (ALU) is required. In additionto performing arithmetical and logical operations, the ALU controls status bits (which are

12、 found in the STATUS register). The result of some instructions force status bits to a value dependingon the state of the result.General Instruction FormatThe Mid-Range MCU instructions can be broken down into four general formats as shown inFigure 5-1. As can be seen the opcode for the instruction

13、varies from 3-bits to 6-bits. This variableopcode size is what allows 35 instructions to be implemented.Central Processing Unit (CPU)The CPU can be thought of as the “brains” of the device. It is responsible forfetching the correctinstruction for execution, decoding that instruction, and then execut

14、ing that instruction.The CPU sometimes works in conjunction with the ALU to complete the execution of the instruction(in arithmetic and logical operations).The CPU controls the program memory address bus, the data memory address bus, andaccesses to the stack.Instruction ClockEach instruction cycle (

15、TCY) is comprised of four Q cycles (Q1-Q4). The Q cycle time is the same as the device oscillator cycle time (TOSC). The Q cycles provide the timing/designation for the Decode, Read, Process Data, Write, etc., of each instruction cycle. The following diagram showsthe relationship of the Q cycles to

16、the instruction cycle.The four Q cycles that make up an instruction cycle (TCY) can be generalized as:Q1: Instruction Decode Cycle or forced No operationQ2: Instruction Read Data Cycle or No operationQ3: Process the DataQ4: Instruction Write Data Cycle or No operationEach instruction will show a det

17、ailed Q cycle operation for the instructionFigure 5-2: Q Cycle ActivityArithmetic Logical Unit (ALU)PICmicro MCUs contain an 8-bit ALU and an 8-bit working register. The ALU is a general purposearithmetic and logical unit. It performs arithmetic and Boolean functions between the datain the working r

18、egister and any register file.Figure 5-3: Operation of the ALU and W RegisterThe ALU is 8-bits wide and is capable of addition, subtraction, shift and logical operations. Unless otherwise mentioned, arithmetic operations are twos complement in nature. In two-operand instructions, typically one opera

19、nd is the working register (W register). The other operand is a file register or an immediate constant. In single operand instructions, the operand is either the W registeror a file register.The W register is an 8-bit working register used for ALU operations. It is not an addressable register.Depend

20、ing on the instruction executed, the ALU may affect the values of the Carry (C), DigitCarry (DC), and Zero (Z) bits in the STATUS register. The C and DC bits operate as a borrow bitand a digit borrow out bit, respectively, in subtraction. See the SUBLW and SUBWF instructions forexamples.STATUS Regis

21、terThe STATUS register, shown in Figure 5-1, contains the arithmetic status of the ALU, the RESETstatus and the bank select bits for data memory. Since the selection of the Data Memory banks is controlled by this register, it is required to be present in every bank. Also, this register is in the sam

22、e relative position (offset) in each bank (see Figure 6-5: “Register File Map” in the “Memory Organization” section).The STATUS register can be the destination for any instruction, as with any other register. If the STATUS register is the destination for an instruction that affects the Z, DC or C bi

23、ts, then the write to these three bits is disabled. These bits are set or cleared according to the device logic. Furthermore,the TO and PD bits are not writable. Therefore, the result of an instruction with theSTATUS register as destination may be different than intended.For example, CLRF STATUS wil

24、l clear the upper-three bits and set the Z bit. This leaves the STATUS register as 000u u1uu (where u = unchanged).It is recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS register because these instructions do not affect the Z, C or DC bits from th

25、eSTATUS register. For other instructions, not affecting any status bitsSTATUS Registerbit 7 IRP: Register Bank Select bit (used for indirect addressing)1 = Bank 2, 3 (100h - 1FFh)0 = Bank 0, 1 (00h - FFh)For devices with only Bank0 and Bank1 the IRP bit is reserved, always maintain this bit clear.bi

26、t 6:5 RP1:RP0: Register Bank Select bits (used for direct addressing)11 = Bank 3 (180h - 1FFh)10 = Bank 2 (100h - 17Fh)01 = Bank 1 (80h - FFh)00 = Bank 0 (00h - 7Fh)Each bank is 128 bytes. For devices with only Bank0 and Bank1 the IRP bit is reserved,always maintain this bit clear.bit 4 TO: Time-out

27、 bit1 = After power-up, CLRWDT instruction, or SLEEP instruction0 = A WDT time-out occurredbit 3 PD: Power-down bit1 = After power-up or by the CLRWDT instruction0 = By execution of the SLEEP instructionbit2 Z: Zero bit1 = The result of an arithmetic or logic operation is zero0 = The result of an ar

28、ithmetic or logic operation is not zerobit 1 DC: Digit carry/borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions) (for borrow the polarityis reversed)1 = A carry-out from the 4th low order bit of the result occurred0 = No carry-out from the 4th low order bit of the resultbit 0 C: Carry/borrow bit (A

29、DDWF, ADDLW,SUBLW,SUBWF instructions)1 = A carry-out from the most significant bit of the result occurred0 = No carry-out from the most significant bit of the result occurredNote: For borrow the polarity is reversed. A subtraction is executed by adding the twoscomplement of the second operand. For r

30、otate (RRF, RLF) instructions, this bit isloaded with either the high or low order bit of the source register.OPTION_REG RegisterThe OPTION_REG register is a readable and writable register which contains various control bitsto configure the TMR0/WDT prescaler, the external INT Interrupt, TMR0, and t

31、he weak pull-upson PORTB.Register 5-2: OPTION_REG Registerbit 7 RBPU: PORTB Pull-up Enable bit1 = PORTB pull-ups are disabled0 = PORTB pull-ups are enabled by individual port latch valuesbit 6 INTEDG: Interrupt Edge Select bit1 = Interrupt on rising edge of INT pin0 = Interrupt on falling edge of IN

32、T pinbit 5 T0CS: TMR0 Clock Source Select bit1 = Transition on T0CKI pin0 = Internal instruction cycle clock (CLKOUT)bit 4 T0SE: TMR0 Source Edge Select bit1 = Increment on high-to-low transition on T0CKI pin0 = Increment on low-to-high transition on T0CKI pinbit 3 PSA: Prescaler Assignment bit1 = P

33、rescaler is assigned to the WDT0 = Prescaler is assigned to the Timer0 modulebit 2-0 PS2:PS0: Prescaler Rate Select bitsPCON RegisterThe Power Control (PCON) register contains flag bit(s), that together with the TO and PD bits,allows the user to differentiate between the device resets.Register 5-3:

34、PCON Registerbit 7 MPEEN: Memory Parity Error Circuitry Status bitThis bit reflects the value of the MPEEN configuration bit.bit 6:3 Unimplemented: Read as 0bit 2 PER: Memory Parity Error Reset Status bit1 = No error occurred0 = A program memory fetch parity error occurred(must be set in software af

35、ter a Power-on Reset occurs)bit 1 POR: Power-on Reset Status bit1 = No Power-on Reset occurred0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)bit 0 BOR: Brown-out Reset Status bit1 = No Brown-out Reset occurred0 = A Brown-out Reset occurred (must be set in softwa

36、re after a Brown-out Reset occurs)附件 3 系统的主程序代码#includereg52.h#include#include#include#include#include#include#define uchar unsigned char#define uint unsigned int#include#define LCDADDR XBYTE0x84ff#define LCDDATA XBYTE0x85ff#define DELAYONOFF XBYTE0X8200#define LEDBLINK XBYTE0X80FF/ 空位0x7e58;0x7e59;

37、0x7e5a;0x7e4b-7e4f;0x7e3b-0x7e3f;0x3a04以下;/#define CLEAR_ME XBYTE0X0000static xdata uchar aaaa1 _at_ 0x0000;static xdata uchar num _at_ 0x7fff;static xdata uint contrl_val _at_ 0x7ff0;static uint xdata delinestep1 _at_ 0x7ff2;/用于断电后继续static uchar xdata coordinatex _at_ 0x7ffe;/断电保存的文件名static uchar x

38、data coordinatey _at_ 0x7ffd;/文件名的步数sbit K_SDA=P11sbit K_SCK=P10; sbit LAMP=P14; float Selectvalue(void);void Clearmemoryzero(void);float Selectvalue1(void);float Selectvalue2(void);float Selectvalue3(void);extern void WRInstrLef(uchar x);extern void WRInstrMID(uchar x);extern void WRInstrRig(uchar

39、x);void WRDATALef(uchar x);void WRDATAMID(uchar x);void WRDATARig(uchar x);/void DelayNS(uchar x);void Init(void);/extern void Disp_Err(void);extern void DispMenu_1(void);void ClearZero(void);static uchar xdata keyfuncindex _at_ 0x7ffc;/用于PID中断调节/static float xdata num2 _at_ 0x7fe0;static uchar xdat

40、a nomalstop _at_ 0x7ffb;/float xdata num _at_ 0x7388;static uchar xdata FileName _at_ 0x7ffa;static float dianliu_1 _at_ 0x7ff4;static uchar xdata background _at_ 0x7ff8;static uchar xdata timer0mark _at_ 0x7ff9;/以上是7ff0-7fffstatic uchar xdata Lampmark _at_ 0x7fef;static uint xdata delinestep _at_ 0

41、x7fe0;static uchar xdata startdelay _at_ 0x7fee;static uchar xdata pause_sign _at_ 0x7fed;uchar xdata QUITFLAG _at_ 0x7fec;uchar xdata specialmark _at_ 0x7feb;uchar xdata QUITFLAG1 _at_ 0x7fea;uchar xdata QUITFLAG2 _at_ 0x7fe9;uchar xdata QUITFLAG3 _at_ 0x7fe8;static uchar xdata ledbuzz _at_ 0x7fe7;

42、static uchar xdata jidianqi _at_ 0x7fe6;static float dianya_1 _at_ 0x7fe2;/以上7fe0-7fef/.static uchar xdata chafangdian_m _at_ 0x7fdf;static uchar xdata AD_BCD5 _at_ 0x7fdastatic uchar xdata AD_BCD15 _at_ 0x7fd5; /*电压BCD值*/static uchar xdata AD_BCD25 _at_ 0x7fd0;/以上是7fd0-7fdfstatic uchar PIDflag=0;st

43、atic uchar PIDflag1=0;static uchar xdata ChargeFlag _at_ 0x7fc7;/充放电标志，如是停止则为0static uchar xdata Chaflag=0; static uchar xdata Chaflag1=0; static uchar xdata Chaflag2=0uchar xdata Cycflag=0; static uchar xdata Cycflag2 _at_ 0x7fc6;uchar xdata editflag=0;/static uchar xdata scalenum _at_ 0x7ff2;/stat

44、ic uchar xdata scalenum1 _at_ 0x7fcf;static uchar xdata endflag _at_ 0x7fc5; /结束标志static uchar xdata endflag1 _at_ 0x7fc4; /结束标志static uchar xdata endflag24 _at_ 0x7fc0;static uchar endflag2_1 _at_ 0x7fc8;uchar xdata transtemp=0;/以上是7fc0-7fc8static float xdata totalampletime053 _at_ 0x7f80;/充电的总的安时数

45、.7f80-7fbcstatic float xdata totalampletime153 _at_ 0x7f40;/放电的总的安时数.7f40-7f7cstatic uchar xdata totalampletimeBDC5 _at_ 0x7fcb;/.static uchar xdata runnumber=0; /文件运行的次数static uchar xdata chongdiantime53 _at_ 0x7f30;/充电的分.static uint xdata chonghour53 _at_ 0x7f00;/充电的小时.static uchar xdata fangdiant

46、ime53 _at_ 0x7f20;/放电的分.static uint xdata fanghour53 _at_ 0x7ee0;/放电的小时.uchar xdata congfangnum1 _at_ 0x7f2f;uchar xdata congfangnum2 _at_ 0x7f3f;/以上是7f00以上的,剩下为7f1e,7f1f,7f7c-7f7f,7fbc-7fbf,7fb7c-7f7fuchar xdata congfangquittime54 _at_ 0x7ec0;/充放电停止时间.static float xdata CURRSCALING _at_ 0x7edc;/电流比

47、例调节static float xdata CURRSCALING1 _at_ 0x7eb0;/电流比例调节static float xdata CURRSCALING2 _at_ 0x7ea0;/电流比例调节static float xdata CURRCOMPEN _at_ 0x7eb4;/电流补偿调节static float xdata CURRCOMPEN1 _at_ 0x7ea4;/电流补偿调节static float xdata CURRCOMPEN2 _at_ 0x7e90;/电流补偿调节static float xdata VOLTSCALING _at_ 0x7eb8;static float xdata VOLTSCALING1 _at_ 0x7ea